By Richard L. Sites, Richard T. Witek
Alpha AXP structure Reference guide
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Additional info for Alpha AXP Architecture Reference Manual
Hardware implementations are encouraged to lock no more than 128 bytes. Software implementations are encouraged to separate locked locations by at least 128 bytes from other locations that could potentially be written by another processor while the first location is locked. Implementation Notes: Implementations that impede the mobility of a cache block on LDx_L, such as that which may occur in a Read for Ownership cache coherency protocol, may release the cache block and make the subsequent STx_C fail if a branch-taken or memory instruction is executed on that processor.
BYTE_ZAP(x,y) X is a quadword, y is an 8-bit vector in which each bit corresponds to a byte of the result. The y bit to x byte correspondence is y
I The operand is an immediate literal in the instruction. r The operand is read only. m The operand is both read and written. w The operand is write only. 3 Operators Table 3-4 describes the operators: Table 3-4: Operator Operators Meaning Comment delimiter Addition Subtraction Signed multiplication *U Unsigned multiplication Exponentiation (left argument raised to right argument) Division Replacement Bit concatenation 0 Indicates explicit operator precedence (x) Contents of memory location whose address is x x
Alpha AXP Architecture Reference Manual by Richard L. Sites, Richard T. Witek